Struct raw_cpuid::ApmInfo

source · [−]

pub struct ApmInfo { /* private fields */ }

Expand description

Processor Power Management and RAS Capabilities (LEAF=0x8000_0007).

Implementations

source

impl ApmInfo

source

pub fn has_mca_overflow_recovery(&self) -> bool

Is MCA overflow recovery available?

If set, indicates that MCA overflow conditions (MCi_STATUS[Overflow]=1) are not fatal; software may safely ignore such conditions. If clear, MCA overflow conditions require software to shut down the system.

Platforms

✅ AMD ❌ Intel (reserved=false)

source

pub fn has_succor(&self) -> bool

Has Software uncorrectable error containment and recovery capability?

The processor supports software containment of uncorrectable errors through context synchronizing data poisoning and deferred error interrupts.

Platforms

✅ AMD ❌ Intel (reserved=false)

source

pub fn has_hwa(&self) -> bool

Has Hardware assert supported?

Indicates support for MSRC001_10[DF:C0].

Platforms

✅ AMD ❌ Intel (reserved=false)

source

pub fn cpu_pwr_sample_time_ratio(&self) -> u32

Specifies the ratio of the compute unit power accumulator sample period to the TSC counter period.

Returns a value of 0 if not applicable for the system.

Platforms

✅ AMD ❌ Intel (reserved=0)

source

pub fn has_ts(&self) -> bool

Is Temperature Sensor available?

Platforms

✅ AMD ❌ Intel (reserved=false)

source

pub fn has_freq_id_ctrl(&self) -> bool

Frequency ID control.

Note

Function replaced by has_hw_pstate.

Platforms

✅ AMD ❌ Intel (reserved=false)

source

pub fn has_volt_id_ctrl(&self) -> bool

Voltage ID control.

Note

Function replaced by has_hw_pstate.

Platforms

✅ AMD ❌ Intel (reserved=false)

source

pub fn has_thermtrip(&self) -> bool

Has THERMTRIP?

Platforms

✅ AMD ❌ Intel (reserved=false)

source

pub fn has_tm(&self) -> bool

Hardware thermal control (HTC)?

Platforms

✅ AMD ❌ Intel (reserved=false)

source

pub fn has_100mhz_steps(&self) -> bool

Has 100 MHz multiplier Control?

Platforms

✅ AMD ❌ Intel (reserved=false)

source

pub fn has_hw_pstate(&self) -> bool

Has Hardware P-state control?

MSRC001_0061 [P-state Current Limit], MSRC001_0062 [P-state Control] and MSRC001_0063 [P-state Status] exist

Platforms

✅ AMD ❌ Intel (reserved=false)

source

pub fn has_invariant_tsc(&self) -> bool

Is Invariant TSC available?

Platforms

✅ AMD ✅ Intel

source

pub fn has_cpb(&self) -> bool

Has Core performance boost?

Platforms

✅ AMD ❌ Intel (reserved=false)

source

pub fn has_ro_effective_freq_iface(&self) -> bool

Has Read-only effective frequency interface?

Indicates presence of MSRC000_00E7 [Read-Only Max Performance Frequency Clock Count (MPerfReadOnly)] and MSRC000_00E8 [Read-Only Actual Performance Frequency Clock Count (APerfReadOnly)].